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this is information on a product in full production. may 2015 docid027030 rev 2 1/16 STD85N10F7AG automotive-grade n-channel 100 v, 0.0085 ? typ., 70 a stripfet? f7 power mosfet in a dpak package datasheet - production data figure 1. internal schematic diagram features ? designed for automotive applications and aec-q101 qualified ? among the lowest r ds(on) on the market ? excellent figure of merit (fom) ? low c rss /c iss ratio for emi immunity ? high avalanche ruggedness applications ? switching applications description this n-channel power mosfet utilizes stripfet? f7 technology with an enhanced trench gate structure that results in very low on- state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. dpak 1 3 tab $0y '7$% * 6 order code v ds r ds(on) max i d p tot STD85N10F7AG 100 v 0.010 ? 70 a 85 w table 1. device summary order code marking package packing STD85N10F7AG 85n10f7 dpak tape and reel www.st.com
contents STD85N10F7AG 2/16 docid027030 rev 2 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 dpak (to-252) type a2 package information . . . . . . . . . . . . . . . . . . . . . 10 4.2 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
docid027030 rev 2 3/16 STD85N10F7AG electrical ratings 16 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v ds drain-source voltage 100 v v gs gate-source voltage 20 v i d drain current (continuous) at t c = 25 c 70 a drain current (continuous) at t c = 100 c 48 i dm (1) 1. pulse width limited by safe operating area. drain current (pulsed) 280 a p tot total dissipation at t c = 25 c 85 w t stg storage temperature - 55 to 175 c t j max. operating junction temperature table 3. thermal data symbol parameter value unit r thj-pcb thermal resistance junction-pcb max 50 c/w r thj-case thermal resistance junction-case max 1.76
electrical characteristics STD85N10F7AG 4/16 docid027030 rev 2 2 electrical characteristics (t c = 25 c unless otherwise specified) table 4. static symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a , v gs = 0 100 v i dss zero gate voltage drain current (v gs = 0) v ds = 100 v 1 a v ds = 100 v, t c =125 c 100 i gss gate-body leakage current (v ds = 0) v gs = 20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2.5 3.5 4.5 v r ds(on) static drain-source on-resistance i d = 40 a, v gs =10 v 0.0085 0.010 ? table 5. dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 50 v, f = 1 mhz, v gs = 0 -3100- pf c oss output capacitance - 700 - c rss reverse transfer capacitance -45- q g total gate charge v dd = 50 v, i d = 70 a, v gs = 10 v (see figure 14 ) -45- nc q gs gate-source charge - 18 - q gd gate-drain charge - 13 - table 6. switching times symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 50 v, i d = 40 a, r g = 4.7 ? , v gs = 10 v (see figure 15 and figure 18 ) -19- ns t r rise time - 32 - t d(off) turn-off delay time - 36 - t f fall time - 13 -
docid027030 rev 2 5/16 STD85N10F7AG electrical characteristics 16 table 7. source drain diode symbol parameter test conditions min. typ. max. unit i sd source-drain current - 70 a i sdm (1) 1. pulse width limited by safe operating area. source-drain current (pulsed) - 280 a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd = 70 a, v gs = 0 - 1.1 v t rr reverse recovery time i sd = 70 a, di/dt = 100 a/s v dd = 80 v, t j =150 c (see figure 18 ) -70 ns q rr reverse recovery charge - 125 nc i rrm reverse recovery current - 3.6 a
electrical characteristics STD85N10F7AG 6/16 docid027030 rev 2 2.1 electrical characteristics (curves) figure 2. safe operating area figure 3. thermal impedance i d 100 10 1 0.1 0.1 1 v ds (v) 10 (a) operation in this area is limited by max r ds(on) 100s 1ms tj=175c tc=25c sinlge pulse 10ms gipd220720131539fsr single pulse =0.5 0.05 0.02 0.01 0.1 0.2 k 10 t p (s) -4 10 -3 10 -1 10 -5 10 -2 10 -2 10 -1 10 0 c am18025v1 figure 4. output characteristics figure 5. transfer characteristics i d 300 200 100 0 0 4 v ds (v) 8 (a) 2 6 5v 250 150 50 6v 7v 8v 9v v gs =10 v am15971v1 i d 300 200 100 0 4 v gs (v) 8 (a) 2 6 50 150 250 v ds =9v 10 am15972v1 figure 6. static drain-source on-resistance figure 7. gate charge vs gate-source voltage r ds(on) 8.1 7.9 7.7 7.5 0 80 i d (a) (m) 40 8.3 8.5 v gs =10v 20 60 8.7 8.9 9.1 am18070v1 v gs 6 4 2 0 0 10 q g (nc) (v) 40 8 20 30 10 v dd =50v i d =70a 12 50 am15974v1
docid027030 rev 2 7/16 STD85N10F7AG electrical characteristics 16 figure 8. capacitance variations figure 9. normalized gate threshold voltage vs temperature c 1500 1000 500 0 0 40 v ds (v) (pf) 20 2000 60 ciss coss crss 80 2500 3000 3500 am15975v1 v gs(th) 0.8 0.6 0.4 0.2 -55 -5 t j (c) (norm) -30 1 70 20 45 95 i d =250a 0 120 1.2 am15976v1 figure 10. normalized on-resistance vs temperature figure 11. source-drain diode forward characteristics figure 12. normalized v ds vs temperature r ds(on) 0.5 0 t j (c) (norm) i d =40a 1 -55 -5 -30 70 20 45 95 120 1.5 2 v gs =10v am15977v1 v sd 0 40 i sd (a) (v) 20 60 80 0.6 0.7 0.8 0.9 t j =-55c t j =150c t j =25c 0.5 1 1.1 am15978v1 v ds t j (c) (norm) 0.96 0.97 0.98 0.99 1 i d =1ma -55 -5 -30 70 20 45 95 120 1.01 1.02 1.03 1.04 am15979v1
test circuits STD85N10F7AG 8/16 docid027030 rev 2 3 test circuits figure 13. switching times test circuit for resistive load figure 14. gate charge test circuit figure 15. test circuit for inductive load switching and diode recovery times figure 16. unclamped inductive load test circuit figure 17. unclamped inductive waveform figure 18. switching time waveform am01468v1 v gs p w v d r g r l d.u.t. 2200 f 3.3 f v dd am01469v1 v dd 47k 1k 47k 2.7k 1k 12v v i =20v=v gmax 2200 f p w i g =const 100 100nf d.u.t. v g am01470v1 a d d.u.t. s b g 25 a a b b r g g fast diode d s l=100h f 3.3 1000 f v dd am01471v1 v i p w v d i d d.u.t. l 2200 f 3.3 f v dd am01472v1 v (br)dss v dd v dd v d i dm i d am01473v1 v ds t on td on td off t off t f t r 90% 10% 10% 0 0 90% 90% 10% v gs
docid027030 rev 2 9/16 STD85N10F7AG package information 16 4 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package information STD85N10F7AG 10/16 docid027030 rev 2 4.1 dpak (to-252) type a2 package information figure 19. dpak (to-252) type a2 package outline bw\sh$buhy
docid027030 rev 2 11/16 STD85N10F7AG package information 16 table 8. dpak (to-252) type a2 mechanical data dim. mm min. typ. max. a 2.20 2.40 a1 0.90 1.10 a2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 d 6.00 6.20 d1 4.95 5.10 5.25 e 6.40 6.60 e1 5.10 5.20 5.30 e 2.16 2.28 2.40 e1 4.40 4.60 h9.35 10.10 l 1.00 1.50 l1 2.60 2.80 3.00 l2 0.65 0.80 0.95 l4 0.60 1.00 r0.20 v2 0 8
package information STD85N10F7AG 12/16 docid027030 rev 2 figure 20. dpak (to-252) recommended footprint (a) a. all dimensions are in millimeters )3bb5
docid027030 rev 2 13/16 STD85N10F7AG package information 16 4.2 packing information figure 21. tape outline p1 a0 d1 p0 f w e d b0 k0 t user direction of feed p2 10 pitches cumulative tolerance on tape +/- 0.2 mm user direction of feed r bending radius b1 for machine ref. only including draft and radii concentric around b0 am08852v1 top cover tape
package information STD85N10F7AG 14/16 docid027030 rev 2 figure 22. reel outline table 9. dpak (to-252) tape and reel mechanical data tape reel dim. mm dim. mm min. max. min. max. a0 6.8 7 a 330 b0 10.4 10.6 b 1.5 b1 12.1 c 12.8 13.2 d 1.5 1.6 d 20.2 d1 1.5 g 16.4 18.4 e1 . 6 5 1 . 8 5n 5 0 f 7.4 7.6 t 22.4 k0 2.55 2.75 p0 3.9 4.1 base qty. 2500 p1 7.9 8.1 bulk qty. 2500 p2 1.9 2.1 r4 0 t0 . 2 5 0 . 3 5 w1 5 . 7 1 6 . 3 a d b full radius g measured at hub c n reel dimensions 40mm min. access hole at slot location t tape slot in core for tape start 25 mm min. width am08851v2
docid027030 rev 2 15/16 STD85N10F7AG revision history 16 5 revision history table 10. document revision history date revision changes 21-oct-2014 1 first release. 26-may-2015 2 text and formatting edits throughout document. promoted document from ?preliminary data? to ?production data? updated device package information.
STD85N10F7AG 16/16 docid027030 rev 2 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved

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